We are seeking a highly skilled and motivated HW Logic Designer to join our hardware development team. The ideal candidate will have a strong background in digital logic design, microarchitecture, and RTL coding. Experience with hardware description languages and FPGA / ASIC design processes is essential.
The candidate will be responsible for complex cryptographic IP block development and implementing patent-pending DPA countermeasures across front-end design, including microarchitecture specification, RTL code development, and verification.
Requirements :
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.
- 4–5 years of hands-on experience in logic design, microarchitecture, and RTL coding in Verilog.
- Proven experience with VCS, Verdi, and Spyglass—or similar tools.
- Experience with FPGA design and implementation, including synthesis, place, and route.
- Familiarity with ASIC design and / or verification methodologies.
- Ability to write detailed, clear microarchitecture and verification reports
- Familiarity with CAD for ASIC design (Synopsys or Cadence).
- Familiarity with formal verification between RTL and Netlist.
- Familiarity with modern cryptography.
- Strong problem-solving skills and attention to detail.
- Excellent communication and teamwork skills.
- Ability to work independently and manage multiple tasks effectively.
Preferred Qualifications :
Experience with hardware simulation and verification tools (ModelSim, QuestaSim, etc.).Knowledge of high-speed interface protocols (PCIe, Ethernet, DDR, etc.).Understanding of SystemVerilog and UVM for verification.Experience with scripting languages (Python, Tcl, etc.) for automation.Knowledge and experience in cryptographic algorithms and countermeasure techniques such as Differential Power Analysis (DPA).Key Responsibilities :
Design, implement, and verify digital logic circuits and systems.Develop and maintain hardware description language (HDL) code, with a primary focus on Verilog / SystemVerilogWork on FPGA / ASIC design, synthesis, and verification, including hands-on RTL coding.Complex cryptographic IP block development and the implementation of patent-pending DPA countermeasures across front-end design, including microarchitecture specification, RTL code development, and verification.Collaborate with software, hardware, and verification engineers in design integration and testing.Perform timing, power, performance, area analysis, and optimization to meet requirements.Participate in design and code reviews and provide constructive feedback.Document design specifications and interfaces.Stay up-to-date with the latest industry trends and technologies related to digital logic design.What We Offer You :
Competitive compensation, based on your experience and skills.Remote work model.Opportunities for career growth and development.Exposure to modern approaches and tools to solve business problems.FortifyIQ is an equal opportunities employer and welcomes applications from all qualified candidates.
#J-18808-Ljbffr